Programmable Peripheral Interface (PPI) Ports

  Ports 60H-63H are decoded by the PC's 8255A Programmable Peripheral
  Interface chip.  These ports control the keyboard and timers and contain
  configuration information collected during the POST.

Port  Description
▀▀▀▀  ▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀▀
060H  Read keyboard:
      IN   al,60H  ;fetches most recent scan code.   See INT 09H
                                                     See Scan Code
      AT keyboard data register.                     See AT Keyboard
      (Note: AT Keyboard register duplicated at port 64H)

061H  PPI port B.
      ╓7┬6┬5┬4┬3┬2┬1┬0╖
      ║ │ │ │ │ │0│ │ ║
      ╙╥┴╥┴╥┴╥┴╥┴─┴╥┴╥╜ bit mask
       ║ ║ ║ ║ ║   ║ ╚═► 0: 01H gate timer channel 2 to speaker
       ║ ║ ║ ║ ║   ╚═══► 1: 02H pulse speaker 1=out, 0=in
       ║ ║ ║ ║ ║            (see Speaker Control for examples)
       ║ ║ ║ ║ ╚═══════► 3: 04H 1=read high switches;
       ║ ║ ║ ║                  0=read low ones (see 62H)
       ║ ║ ║ ╚═════════► 4: 10H 0=enable RAM parity checking; 1=disable
       ║ ║ ╚═══════════► 5: 20H 0=enable I/O channel check
       ║ ╚═════════════► 6: 40H 0=hold keyboard clock low
       ╚═══════════════► 7: 80H 0=enable keyboard; 1=disable keyboard

062H  PPI port C.
      ╓7┬6┬5┬4┬3┬2┬1┬0╖
      ║ │ │ │0│equipmt║
      ╙╥┴╥┴╥┴─┴─┴─┴─┴─╜ bit
       ║ ║ ║   ╚═════╩═► 0-3: DIP switch values.     See Equipment List
       ║ ║ ╚═══════════►   5: 1=Timer 2 channel out
       ║ ╚═════════════►   6: 1=I/O channel check
       ╚═══════════════►   7: 1=RAM parity check error occurred.

See Also: Speaker Control
          I/O Port Map
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